/**
 @file sys_usw_common.h

 @date 2010-3-10

 @version v2.0

*/

#ifndef _SYS_USW_COMMON_H
#define _SYS_USW_COMMON_H
#ifdef __cplusplus
extern "C" {
#endif

#include "sal.h"
#include "ctc_const.h"
#include "ctc_warmboot.h"
#include "sys_usw_mchip.h"
#include "sys_usw_api.h"


#define SYS_COMMON_USELESS_MAC  0xffff
#define SYS_COMMON_USELESS_CHANNEL (DRV_FROM_AT(lchip)?0xffff:0xff)
#define SYS_MAX_LOCAL_SLICE_NUM       1
#define SYS_MAX_PP_NUM 8
#define SYS_PORT_EGR_SCL_HASH_TYPE_NSH      0xF
#define SYS_PHY_PORT_NUM_PER_SLICE   MCHIP_CAP(SYS_CAP_PHY_PORT_NUM_PER_SLICE)

#define SYS_USW_DROP_NH_OFFSET            0x3ffff
#define SYS_USW_LB_HASH_CTL_NUM           4
#define SYS_USW_LB_HASH_BIT_NUM           128
#define SYS_USW_XPIPE_RSV_PORT (MCHIP_CAP(SYS_CAP_INTERNAL_PORT_END) + 1)
#define SYS_USW_MAX_VLAN_BASE 0x3FFF
#define SYS_LP_GRP_ID_MAX 0x3FF /* decide by EpeNextHopCtl.scl0DvpGidMask */
#define SYS_ISOLATION_ID_MAX 0x1F /* decide by EpeNextHopCtl.scl1DvpGidMask */
#define SYS_INVALID_ISOLATION_ID 0xFFFF

#define SYS_USW_LB_HASH_CHK_OFFSET(lb_hash_offset) \
    do {\
        if (lb_hash_offset != CTC_LB_HASH_OFFSET_DISABLE)\
        {\
            CTC_MAX_VALUE_CHECK((lb_hash_offset&0xFFFFFF7F), (SYS_USW_LB_HASH_BIT_NUM-1));\
        }\
    }while(0)

#define SYS_DUMP_DB_LOG(p_file, fmt, arg...)        \
  do {                                              \
    if(NULL == p_file)                              \
    {                                               \
        if(g_ctc_debug_show_print_cb)               \
        {                                           \
            g_ctc_debug_show_print_cb(fmt, ##arg);  \
        }                                           \
    }                                               \
    else                                            \
    {                                               \
        sal_fprintf(p_file, fmt, ##arg);            \
    }                                               \
  } while (0)

#define SWAPVAL(T, a, b) { T tmp; tmp=a; a=b; b=tmp; }
/*--------------------------------------------------------------------------------
 *               channel allocation
 *--------------------------------------------------------------------------------*/

/* define network port chanid */
#define GMAC_MIN_CHANID              0

/*--------------------------------------------------------------------------------
 *               localphy port allocation
 *--------------------------------------------------------------------------------
 *
 */
#define SYS_INTERNAL_PORT_START MCHIP_CAP(SYS_CAP_INTERNAL_PORT_START)
#define SYS_INTERNAL_PORT_END   MCHIP_CAP(SYS_CAP_INTERNAL_PORT_END)
#define SYS_RSV_PORT_START  MCHIP_CAP(SYS_CAP_RSV_PORT_START)
#define SYS_RSV_PORT_WLAN_ENCAP MCHIP_CAP(SYS_CAP_RSV_PORT_WLAN_ENCAP)
#define SYS_RSV_PORT_WLAN_E2ILOOP   MCHIP_CAP(SYS_CAP_RSV_PORT_WLAN_E2ILOOP)
#define SYS_RSV_PORT_CAWAP_DECRYPT0_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_CAWAP_DECRYPT0_ID)
#define SYS_RSV_PORT_CAWAP_DECRYPT1_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_CAWAP_DECRYPT1_ID)
#define SYS_RSV_PORT_CAWAP_DECRYPT2_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_CAWAP_DECRYPT2_ID)
#define SYS_RSV_PORT_CAWAP_DECRYPT3_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_CAWAP_DECRYPT3_ID)
#define SYS_RSV_PORT_CAWAP_ENCRYPT0_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_CAWAP_ENCRYPT0_ID)
#define SYS_RSV_PORT_CAWAP_ENCRYPT1_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_CAWAP_ENCRYPT1_ID)
#define SYS_RSV_PORT_CAWAP_ENCRYPT2_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_CAWAP_ENCRYPT2_ID)
#define SYS_RSV_PORT_CAWAP_ENCRYPT3_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_CAWAP_ENCRYPT3_ID)
#define SYS_RSV_PORT_CAWAP_REASSEMBLE_ID    MCHIP_CAP(SYS_CAP_RSV_PORT_CAWAP_REASSEMBLE_ID)
#define SYS_RSV_PORT_MAC_ENCRYPT_ID MCHIP_CAP(SYS_CAP_RSV_PORT_MAC_ENCRYPT_ID)
#define SYS_RSV_PORT_MAC_DECRYPT_ID MCHIP_CAP(SYS_CAP_RSV_PORT_MAC_DECRYPT_ID)
#define SYS_RSV_PORT_EUNIT0_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_EUNIT0_ID)
#define SYS_RSV_PORT_EUNIT1_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_EUNIT1_ID)
#define SYS_RSV_PORT_MOD_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_MOD_ID)
#define SYS_RSV_PORT_BYPASS_IPE_ID  MCHIP_CAP(SYS_CAP_RSV_PORT_BYPASS_IPE_ID)
#define SYS_RSV_PORT_E2ILOOP_ID MCHIP_CAP(SYS_CAP_RSV_PORT_E2ILOOP_ID)
#define SYS_RSV_PORT_DROP_ID    MCHIP_CAP(SYS_CAP_RSV_PORT_DROP_ID)
#define SYS_RSV_PORT_OAM_CPU_ID MCHIP_CAP(SYS_CAP_RSV_PORT_OAM_CPU_ID)
#define SYS_RSV_PORT_OAM_CPU1_ID MCHIP_CAP(SYS_CAP_RSV_PORT_OAM_CPU1_ID)
#define SYS_RSV_PORT_ELOOP_ID   MCHIP_CAP(SYS_CAP_RSV_PORT_ELOOP_ID)
#define SYS_RSV_PORT_ELOOP1_ID   MCHIP_CAP(SYS_CAP_RSV_PORT_ELOOP1_ID)
#define SYS_RSV_PORT_IP_TUNNEL  MCHIP_CAP(SYS_CAP_RSV_PORT_IP_TUNNEL)
#define SYS_RSV_PORT_MIRROR MCHIP_CAP(SYS_CAP_RSV_PORT_MIRROR)
#define SYS_RSV_PORT_TO_CPU MCHIP_CAP(SYS_CAP_RSV_PORT_TO_CPU)
#define SYS_RSV_PORT_HMAC   MCHIP_CAP(SYS_CAP_RSV_PORT_HMAC)
#define SYS_RSV_PORT_ILOOP_ID   MCHIP_CAP(SYS_CAP_RSV_PORT_ILOOP_ID)
#define SYS_RSV_PORT_ILOOP1_ID   MCHIP_CAP(SYS_CAP_RSV_PORT_ILOOP1_ID)
#define SYS_RSV_PORT_SPINE_LEAF_PORT    MCHIP_CAP(SYS_CAP_RSV_PORT_SPINE_LEAF_PORT)
#define SYS_RSV_PORT_END    (MCHIP_CAP(SYS_CAP_PORT_NUM) - 1)

#define SYS_SNAT_EDIT_PTR_BASE     16*1024

/*global reserved nexthop */
#define SYS_NH_RESOLVED_NHID_FOR_NONE            0
#define SYS_NH_RESOLVED_NHID_FOR_DROP            1
#define SYS_NH_RESOLVED_NHID_FOR_TOCPU           2
#define SYS_NH_RESOLVED_NHID_MAX              3
#define SYS_NH_INVALID_OFFSET        0xFFFF

#define SYS_MC_BITMAP_MAX_PORT 128
#define SYS_MC_BITMAP_WORDS ((SYS_MC_BITMAP_MAX_PORT + CTC_UINT32_BITS -1 ) / CTC_UINT32_BITS)

#define SYS_MC_PORT_TYPE_1X_0 0  /*AT*/
#define SYS_MC_PORT_TYPE_1X_1 1  /*AT*/
#define SYS_MC_PORT_TYPE_1X_2 2  /*AT*/
#define SYS_MC_PORT_TYPE_1X_3 3  /*AT*/
#define SYS_MC_PORT_TYPE_2X   4  /*for AT, if dest_id > SYS_MET_VEC_2X_PORT_BASE, must use DsMetVector2X*/
#define SYS_MC_PORT_TYPE_4X   5
#define SYS_NH_INVALID_NHID            0xFFFFFFFF
#define SYS_NH_DSNH_BY_PASS_FLAG   (1 << 17)    /*Egress Edit Mode for By pass Ingress Chip Edit */
#define SYS_MC_DESTID_IS_NOT_TOCPU(destid) (!SYS_LPORT_IS_CPU_ETH(lchip, destid))

enum sys_aging_timer_e
{
    SYS_AGING_TIMER_INDEX_NONE    = 0,
    SYS_AGING_TIMER_INDEX_MAC     = 1,     /*for normal fdb aging*/
    SYS_AGING_TIMER_INDEX_RSV     = 2,     /*for RTL Bug 106537*/
    SYS_AGING_TIMER_INDEX_PENDING = 3,     /*for pending fdb aging*/
    SYS_AGING_TIMER_INDEX_MAX
};

#define  SYS_CPU_MAC_LPORT_MIN  240
#define  SYS_CPU_MAC_ID_MIN     MCHIP_CAP(SYS_CAP_CPUMAC_ID_MIN)
#define  SYS_CPU_MAC_LPORT_MAX  243
#define  SYS_CPU_MAC_ID_MAX     MCHIP_CAP(SYS_CAP_CPUMAC_ID_MAX)
#define  SYS_AGING_PP_EN_BIT    7

#define VLAN_RANGE_ENTRY_NUM    64

/*************************DestMap Encode*************************/
/*ucast:mc(1bit)+useProfile(1)+tocpu(1)+dest_chipid(7)+destid(9)*/
/*mcast:mc(1bit)+rsv(2)+mc_grpid(16)*/

#define SYS_ENCODE_DESTMAP( gchip,lport)        ((((gchip)&0x7F) << 9) | ((lport)&0x1FF))
#define SYS_DECODE_DESTMAP_GCHIP(destmap)       (((destmap)&0xFFFF)>>9)
#define SYS_DECODE_APS_DESTMAP_GCHIP(destmap)        (((destmap)&0x7FFFF)>>12)
#define SYS_DECODE_DESTMAP_LPORT(destmap)       ((destmap)&0x1FF)
#define SYS_ENCODE_ARP_DESTMAP( destmap_profile)   ((0<<18)|(1<<17)|((destmap_profile)&0xFFFF))

#define SYS_ENCODE_APS_DESTMAP( gchip,lport)        ((((gchip)&0x7F) << 12) | ((lport)&0xFFF))

#define SYS_CHIPID_RESERVED_ECMP (0X7f)
#define SYS_ENCODE_ECMP_DESTMAP( group_id)       (((group_id)>>9 & 0x03)<<16 | SYS_CHIPID_RESERVED_ECMP<<9 | ((group_id)&0x1FF))

#define SYS_DECODE_ECMP_DESTMAP(destmap)         ((((destmap) >> 16 & 0x03) << 9) | ((destmap) & 0x1FF) )
#define SYS_IS_ECMP_DESTMAP(destmap)             ((((destmap) >> 9 & 0x7F) ==  SYS_CHIPID_RESERVED_ECMP)? 1 : 0)
/*to lcpu(DMA)*/
#define SYS_REASON_PRI_ENQ_SHIFT 15
#define SYS_ENCODE_EXCP_DESTMAP_MET(gchip, queueId) ((1 <<10) |((queueId)&0x1FF))
#define SYS_ENCODE_EXCP_DESTMAP(gchip, queueId) (CTC_IS_BIT_SET(queueId, SYS_REASON_PRI_ENQ_SHIFT) ? SYS_ENCODE_EXCP_DESTMAP_GRP(gchip, queueId/MCHIP_CAP(SYS_CAP_REASON_GRP_QUEUE_NUM)) : ((1 <<16) | (((gchip)&0x7F) << 9) | ((queueId)&0x1FF)))
#define SYS_ENCODE_EXCP_DESTMAP_GCHIP(gchip, destmap) ((destmap&(~(0x7F<<9))) | ((gchip&0x7F)<<9))

/*DestId(7) mean to cpu based on prio, destId(3,0) mean reason grp, DestId(18) mean mcast group(arctic need),*/
#define SYS_ENCODE_EXCP_DESTMAP_DMA_CHAN(grpId) (MCHIP_CAP(SYS_CAP_CHANID_DMA_NUM)==4 ? ((((grpId)>>2)&0x3)<<5) : (MCHIP_CAP(SYS_CAP_CHANID_DMA_NUM)==2 ? ((((grpId)>>3)&0x1)<<6) : 0))
#define SYS_ENCODE_EXCP_DESTMAP_GRP(gchip, grpId) ((1 <<16) | (((gchip)&0x7F) << 9) | (1 <<7)| SYS_ENCODE_EXCP_DESTMAP_DMA_CHAN(grpId) | ((grpId)&0xF))
#define SYS_ENCODE_EXCP_DESTMAP_MC_GRP(gchip, grpId) ((1 <<18) | SYS_ENCODE_EXCP_DESTMAP_GRP(gchip, grpId))
#define SYS_ENCODE_EXCP_DESTMAP_MET_GRP(gchip, grpId) ((1 <<10) | (1 <<7) | SYS_ENCODE_EXCP_DESTMAP_DMA_CHAN(grpId) | ((grpId)&0xF))

#define SYS_DESTMAP_IS_CPU(destmap) ((((destmap) >> 16)&0x1) == 1)
#define SYS_DESTMAP_IS_PROFILE(destmap) ((((destmap) >> 17)&0x1) == 1)
#define SYS_DESTMAP_IS_MCAST(destmap) ((((destmap) >> 18)&0x1) == 1)
#define SYS_DESTMAP_IS_GRP(destmap) ((((destmap) >> 7)&0x1) == 1)

/*to lcpu(ETH)*/

/*TMM, to lcpu(CPU MAC), DestId(6) used for distinguish C2C*/
#define SYS_ENCODE_DESTMAP_CPU_MAC( gchip, cpumacid)     ((1 << 16) | (((gchip)&0x7F) << 9) | (1 << 7) | (1 << 6) | ((cpumacid)&0x3) << 4)
#define SYS_DESTMAP_IS_CPU_MAC(destmap) (((((destmap) >> 16)&0x1) == 1)&&((((destmap) >> 7)&0x1) == 1)&&((((destmap) >> 6)&0x1) == 1))
#define SYS_DESTMAP_TO_CPU_MAC(destmap) (((destmap)>>4) & 0x3)

/*mirror to network port*/
#define SYS_ENCODE_MIRROR_DESTMAP(gchip, lport) ((((gchip)&0x7F) << 9) | ((lport)&0x1FF))

#define SYS_ENCODE_MCAST_IPE_DESTMAP(group) ((1<<18)|((group)&0x3ffff))

#define SYS_IS_DROP_PORT(gport)   (CTC_MAP_GPORT_TO_LPORT(gport) == SYS_RSV_PORT_DROP_ID)


#define CONTAINER_OF(POINTER, STRUCT, MEMBER)                           \
        ((STRUCT *) (void *) ((char *) (POINTER) - CTC_OFFSET_OF (STRUCT, MEMBER)))

#define SYS_IS_NETWORK_CHANNEL(channel) \
        (((DRV_IS_TMM(lchip) || DRV_IS_TMG(lchip))) \
        ? ((channel % MCHIP_CAP(SYS_CAP_PER_DP_CHANNEL_NUM)) < MCHIP_CAP(SYS_CAP_NETWORK_CHANNEL_NUM)) \
        : (channel < MCHIP_CAP(SYS_CAP_NETWORK_CHANNEL_NUM)))

/* mirror's session-id correspond to per acl lookup's priority-id, and mirror's priority-id correspond to acl lookup index */
#define SYS_ACL_LOG_EXCEPTION_IDX(dir, session_id, priority_id)\
        ((CTC_INGRESS == dir)\
        ? (MCHIP_CAP(SYS_CAP_MIRROR_INGRESS_ACL_LOG_INDEX_BASE) + (priority_id * MAX_CTC_MIRROR_SESSION_ID) + session_id)\
        : (MCHIP_CAP(SYS_CAP_MIRROR_EGRESS_ACL_LOG_INDEX_BASE) + (priority_id * MAX_CTC_MIRROR_SESSION_ID) + session_id))

/* TMG channel convert */
#define SYS_USW_CHANNEL_ENCODE(chan) ((DRV_IS_TMG(lchip) ? (((((chan) >> 6) & 1) << 7) | ((chan) & 0x3F)) : (chan)))
#define SYS_USW_CHANNEL_DECODE(chan) ((DRV_IS_TMG(lchip) ? (((((chan) >> 7) & 1) << 6) | ((chan) & 0x3F)) : (chan)))

#ifdef CTC_WB_RT_SYNC
#define SYS_WB_MALLOC(mod,subid,type, size) ctc_wb_malloc(lchip,CTC_WB_APPID(mod,subid),type,size)
#define SYS_WB_FREE(mod,subid,ptr) ctc_wb_free(lchip,CTC_WB_APPID(mod,subid),ptr,0)
#define  SYS_WB_RT_SYNC  1
#else
#define SYS_WB_MALLOC(mod,subid,type, size) mem_malloc( type,size)
#define SYS_WB_FREE(mod,subid,ptr) mem_free(ptr)
#define SYS_WB_RT_SYNC  0

#endif


/*qos domain/prio max value*/

enum sys_ad_union_g_type_e
{
    SYS_AD_UNION_G_NA  = 0,
    SYS_AD_UNION_G_1   = 1,
    SYS_AD_UNION_G_2   = 2,
    SYS_AD_UNION_G_3   = 3,
    SYS_AD_UNION_G_4   = 4,
    SYS_AD_UNION_G_5   = 5,
    SYS_AD_UNION_G_6   = 6,
    SYS_AD_UNION_G_7   = 7,
    /*SYS_AD_UNION_G_INVALID   = 8*/
};

#define FEATURE_SUPPORT_CHECK(feature) \
{\
    LCHIP_CHECK(lchip); \
    if (CTC_FEATURE_MAX <= feature) \
        return CTC_E_INVALID_PARAM; \
    if (FALSE == MCHIP_FEATURE_CAP(lchip,feature)) \
        return CTC_E_NOT_SUPPORT;\
}

#define SYS_GLOBAL_CHIPID_CHECK(gchip)      \
    if ((gchip == 0x1F) || (gchip > MCHIP_CAP(SYS_CAP_GCHIP_CHIP_ID)))          \
    {                                       \
        return CTC_E_INVALID_CHIP_ID; \
    }

#define SYS_GLOBAL_PORT_CHECK(gport)                                                          \
{    \
    uint8 temp_lchip = 0;   \
     if ((CTC_IS_LINKAGG_PORT(gport) && (CTC_GPORT_LINKAGG_ID(gport)    > SYS_USW_MAX_LINKAGG_ID))  \
        || (!CTC_IS_LINKAGG_PORT(gport) && (!CTC_IS_CPU_PORT(gport)) \
        && ((!sys_usw_get_local_chip_id(CTC_MAP_GPORT_TO_GCHIP(gport), &temp_lchip) && (CTC_MAP_GPORT_TO_LPORT(gport) >= MCHIP_CAP(SYS_CAP_PORT_NUM_PER_CHIP)))  \
        || (sys_usw_get_local_chip_id(CTC_MAP_GPORT_TO_GCHIP(gport), &temp_lchip) && (CTC_MAP_GPORT_TO_LPORT(gport) >= MCHIP_CAP(SYS_CAP_PORT_NUM_GLOBAL))))) \
        || CTC_MAP_GPORT_TO_GCHIP(gport) > MCHIP_CAP(SYS_CAP_GCHIP_CHIP_ID))  \
    {                                                                                         \
        return CTC_E_INVALID_PORT;                                                     \
    }   \
}

#define SYS_GPORT_CHECK_WITH_UNLOCK(gport, lock)                                                          \
{    \
    uint8 temp_lchip = 0;   \
     if ((CTC_IS_LINKAGG_PORT(gport) && (CTC_GPORT_LINKAGG_ID(gport)    > SYS_USW_MAX_LINKAGG_ID))  \
        || (!CTC_IS_LINKAGG_PORT(gport) && (!CTC_IS_CPU_PORT(gport)) \
        && ((!sys_usw_get_local_chip_id(CTC_MAP_GPORT_TO_GCHIP(gport), &temp_lchip) && (CTC_MAP_GPORT_TO_LPORT(gport) >= MCHIP_CAP(SYS_CAP_PORT_NUM_PER_CHIP)))  \
        || (sys_usw_get_local_chip_id(CTC_MAP_GPORT_TO_GCHIP(gport), &temp_lchip) && (CTC_MAP_GPORT_TO_LPORT(gport) >= MCHIP_CAP(SYS_CAP_PORT_NUM_GLOBAL))))))  \
    {                                                                                         \
        sal_mutex_unlock(lock);    \
        return CTC_E_INVALID_PORT;                                                     \
    }   \
}

#define SYS_USW_CID_CHECK(lchip,cid)  \
     if ( ((cid) == CTC_ACL_UNKNOWN_CID && !DRV_FROM_TMM(lchip)) || \
          ((cid) > MCHIP_CAP(SYS_CAP_ACL_MAX_CID_VALUE)) ) \
    { return CTC_E_BADID; }

#define SYS_USW_DESTMAP_TO_DRV_GPORT(destmap) \
    ((((destmap >> 9) & 0x7F) << 9) | (destmap & 0x1FF)); \

#define SYS_UINT64_SET(val_64, value)  do{\
    val_64 = value[1];\
    val_64 <<= 32;\
    val_64 |= value[0];\
    }while(0)

#define SYS_USW_SET_HW_MAC(dest, src)     \
    {   \
        (dest)[1]= (((src)[0] << 8)  | ((src)[1]));        \
        (dest)[0]= (((src)[2] << 24) | ((src)[3] << 16) | ((src)[4] << 8) | ((src)[5])); \
    }

/*dest is uint32 array, src is uint8 array, byte must be devided by 4*/
#define SYS_USW_SET_HW_VALUE(dest, src, byte)      \
        {  \
            uint8 word_len = byte>>2;  \
            uint8 offset = 0;             \
            int16 loop = 0;             \
            for (loop =word_len-1;loop >=0;loop--)   \
            {  \
                offset = (word_len-1-loop)*4;    \
                (dest)[loop]= (((src)[offset] << 24) | ((src)[offset+1] << 16) | ((src)[offset+2] << 8) | ((src)[offset+3])); \
            }  \
        }  \
/*dest is uint8 array, src is uint32 array, byte must be devided by 4*/
#define SYS_USW_SET_USER_VALUE(dest, src, byte)      \
        {  \
            uint8 word_len = byte>>2;  \
            uint8 offset = 0;             \
            int16 loop = 0;             \
            for (loop =word_len-1;loop >=0;loop--)   \
            {  \
                offset = (word_len-1-loop)*4;    \
                (dest)[offset] = ((src)[loop]) >> 24;\
                (dest)[offset+1] = ((src)[loop]) >> 16;\
                (dest)[offset+2] = ((src)[loop]) >> 8;\
                (dest)[offset+3] = ((src)[loop]);\
            }  \
        }  \

#define SYS_USW_SET_HW_UDF(granularity, dest, src)     \
    if (granularity)\
    {\
        (dest)[3] = ((src)[14] << 24 | src[15] << 16 | src[12] << 8 | src[13]);     \
        (dest)[2] = ((src)[10] << 24 | src[11] << 16 | src[8] << 8 | src[9]);        \
        (dest)[1] = ((src)[6] << 24 | src[7] << 16 | src[4] << 8 | src[5]);           \
        (dest)[0] = ((src)[2] << 24 | src[3] << 16 | src[0] << 8 | src[1]);           \
    } \
    else \
    { \
        (dest)[3] = ((src)[12] << 24 | src[13]<<16| src[14]<<8|src[15]);                    \
        (dest)[2] = ((src)[8] << 24 | src[9]<<16| src[10]<<8|src[11]);                       \
        (dest)[1] = ((src)[4] << 24 | src[5]<<16| src[6]<<8|src[7]);                        \
        (dest)[0] = ((src)[0] << 24 | src[1]<<16| src[2]<<8|src[3]);                        \
    }

#define SYS_USW_SET_HW_UDF_WITH_VALID(granularity, dest, src, valid)     \
    if (granularity)\
    {\
        (dest)[3] = ((CTC_IS_BIT_SET(valid, 7) ? (src[14] << 24 | src[15] << 16) : 0) | (CTC_IS_BIT_SET(valid, 6) ? (src[12] << 8 | src[13]): 0));     \
        (dest)[2] = ((CTC_IS_BIT_SET(valid, 5) ? (src[10] << 24 | src[11] << 16): 0) | (CTC_IS_BIT_SET(valid, 4) ? (src[8] << 8 | src[9]): 0));        \
        (dest)[1] = ((CTC_IS_BIT_SET(valid, 3) ? (src[6] << 24 | src[7] << 16) : 0) | (CTC_IS_BIT_SET(valid, 2) ? (src[4] << 8 | src[5]): 0));           \
        (dest)[0] = ((CTC_IS_BIT_SET(valid, 1) ? (src[2] << 24 | src[3] << 16) : 0) | (CTC_IS_BIT_SET(valid, 0) ? (src[0] << 8 | src[1]): 0));           \
    } \
    else \
    {\
        (dest)[3] = ((CTC_IS_BIT_SET(valid, 7) ? (src[12] << 24 | src[13] << 16) : 0) | (CTC_IS_BIT_SET(valid, 6) ? (src[14] << 8 | src[15]): 0));     \
        (dest)[2] = ((CTC_IS_BIT_SET(valid, 5) ? (src[8] << 24 | src[9] << 16): 0) | (CTC_IS_BIT_SET(valid, 4) ? (src[10] << 8 | src[11]): 0));        \
        (dest)[1] = ((CTC_IS_BIT_SET(valid, 3) ? (src[4] << 24 | src[5] << 16) : 0) | (CTC_IS_BIT_SET(valid, 2) ? (src[6] << 8 | src[7]): 0));           \
        (dest)[0] = ((CTC_IS_BIT_SET(valid, 1) ? (src[0] << 24 | src[1] << 16) : 0) | (CTC_IS_BIT_SET(valid, 0) ? (src[2] << 8 | src[3]): 0));           \
    }

#define SYS_USW_SET_USR_UDF(granularity, dest, src)     \
    if(granularity)\
    {\
        (dest)[0] = ((src)[0]) >> 8;\
        (dest)[1] = ((src)[0]) ;\
        (dest)[2] = ((src)[0]) >> 24;\
        (dest)[3] = ((src)[0]) >> 16;\
        (dest)[4] = ((src)[1]) >> 8;\
        (dest)[5] = ((src)[1]) ;\
        (dest)[6] = ((src)[1]) >> 24;\
        (dest)[7] = ((src)[1]) >> 16;\
        (dest)[8] = ((src)[2]) >> 8;\
        (dest)[9] = ((src)[2]) ;\
        (dest)[10] = ((src)[2]) >> 24;\
        (dest)[11] = ((src)[2]) >> 16;\
        (dest)[12] = ((src)[3]) >> 8;\
        (dest)[13] = ((src)[3]) ;\
        (dest)[14] = ((src)[3]) >> 24;\
        (dest)[15] = ((src)[3]) >> 16;\
    } \
    else \
    { \
        (dest)[0] = ((src)[0]) >> 24;\
        (dest)[1] = ((src)[0]) >> 16;\
        (dest)[2] = ((src)[0]) >> 8;\
        (dest)[3] = ((src)[0]) ;\
        (dest)[4] = ((src)[1]) >> 24;\
        (dest)[5] = ((src)[1]) >> 16;\
        (dest)[6] = ((src)[1]) >> 8;\
        (dest)[7] = ((src)[1]) ;\
        (dest)[8] = ((src)[2]) >> 24;\
        (dest)[9] = ((src)[2]) >> 16;\
        (dest)[10] = ((src)[2]) >> 8;\
        (dest)[11] = ((src)[2]) ;\
        (dest)[12] = ((src)[3]) >> 24;\
        (dest)[13] = ((src)[3]) >> 16;\
        (dest)[14] = ((src)[3]) >> 8;\
        (dest)[15] = ((src)[3]) ;\
    }

#define SYS_USW_SET_XDATA(width, offset, value, ds)\
{\
    uint32 mask = ((1 << (width))-1) << ((offset) % CTC_CONST32);\
    uint32 data = ((value) << ((offset) % CTC_CONST32));\
    ds[(offset)/CTC_CONST32] = (ds[(offset)/CTC_CONST32] & ~mask)| (data & mask);\
}
    
#define SYS_USW_GET_XDATA(width, offset, value, ds)\
{\
    uint32 mask = ((1 << (width))-1) << ((offset) % CTC_CONST32);\
    value = (ds[(offset)/CTC_CONST32] & mask) >> ((offset) % CTC_CONST32);\
}


#define SWAP32(x) \
    ((uint32)( \
         (((uint32)(x) & (uint32)0x000000ffUL) << 24) | \
         (((uint32)(x) & (uint32)0x0000ff00UL) << 8) | \
         (((uint32)(x) & (uint32)0x00ff0000UL) >> 8) | \
         (((uint32)(x) & (uint32)0xff000000UL) >> 24)))

#define SYS_USW_REVERT_SATPDU_BYTE(dest, src)     \
    {   uint8* p_src = (uint8*)src; \
        uint32* p_dest = (uint32*)dest; \
        (p_dest)[0] = ((p_src)[4] << 24 | p_src[5]<<16| p_src[6]<<8|p_src[7]);                        \
        (p_dest)[1] = ((p_src)[0] << 24 | p_src[1]<<16| p_src[2]<<8|p_src[3]);     \
    }
#define SYS_USW_REVERT_SCI_BYTE(dest, src)     \
    {   uint8* p_src = (uint8*)src; \
        uint32* p_dest = (uint32*)dest; \
        (p_dest)[0] = ((p_src)[4] << 24 | p_src[5]<<16| p_src[6]<<8|p_src[7]);                        \
        (p_dest)[1] = ((p_src)[0] << 24 | p_src[1]<<16| p_src[2]<<8|p_src[3]);     \
    }

#define SYS_USW_REVERT_BYTE(dest, src)     \
    {   \
        (dest)[1]= (src)[0]; \
        (dest)[0]= (src)[1]; \
    }

#define SYS_USW_SET_USER_MAC(dest, src)     \
    {   \
        (dest)[0] = (src)[1] >> 8;          \
        (dest)[1] = (src)[1] & 0xFF;        \
        (dest)[2] = (src)[0] >> 24;         \
        (dest)[3] = ((src)[0] >> 16) & 0xFF;\
        (dest)[4] = ((src)[0] >> 8) & 0xFF; \
        (dest)[5] = (src)[0] & 0xFF;        \
    }
#define SYS_USW_SET_USER_MAC_PREFIX(dest, src)     \
    {   \
        (dest)[0] = (src)[1] & 0xFF;          \
        (dest)[1] = (src)[0] >> 24;        \
        (dest)[2] = ((src)[0] >> 16) & 0xFF;         \
        (dest)[3] = ((src)[0] >> 8) & 0xFF;\
        (dest)[4] = (src)[0] & 0xFF; \
    }

#define SYS_USW_REVERT_IP6(dest, src)     \
    {                                            \
        (dest)[3] = (src)[0];                        \
        (dest)[2] = (src)[1];                        \
        (dest)[1] = (src)[2];                        \
        (dest)[0] = (src)[3];                        \
    }

#define SYS_CHECK_UNION_BITMAP(gtype,gtype_value) \
if(no_aset && SYS_AD_UNION_G_NA != gtype)\
{\
    if( gtype != gtype_value ) \
    {\
        return CTC_E_PARAM_CONFLICT;\
    }\
}

#define SYS_SET_UNION_TYPE(gtype,gtype_value,T,un_id,ds, is_add) \
 { \
    if(no_aset)\
    {\
        uint32 fld_data[4] = {0};\
        if(is_add)  {\
            (gtype) = (gtype_value);\
        }else {\
            Get##T(A, u##un_id##_data_f, ds, fld_data);\
            (gtype) = (!fld_data[0] && !fld_data[1] && !fld_data[2] && !fld_data[3])? 0: (gtype);\
        }\
    }\
 }

#define SYS_LOGIC_PORT_CHECK(logic_port)           \
    if ((logic_port) >= sys_usw_common_get_vport_num(lchip)) \
    { return CTC_E_INVALID_PORT; }

#define SYS_LOGIC_PORT_CHECK_WITH_UNLOCK(logic_port, lock)           \
    if ((logic_port) >= sys_usw_common_get_vport_num(lchip)) \
    {    \
        sal_mutex_unlock(lock);    \
        return CTC_E_INVALID_PORT;  \
    }

#define SYS_USW_LOGIC_PORT_CHECK(logic_port)       \
    if ((logic_port) > MCHIP_CAP(SYS_CAP_MAX_LOGIC_PORT)) \
    { return CTC_E_INVALID_PORT; }

#define SYS_USW_FID_CHECK(fid)       \
    if ((fid) > MCHIP_CAP(SYS_CAP_FID_NUM)) \
    { return CTC_E_INVALID_PARAM; }

#define SYS_USW_METADATE_CHECK(matadate)       \
    if ( matadate > ((1<<DRV_ENUM(DRV_KEY_METADATA_BITS)) - 1)) \
    { return CTC_E_INVALID_PARAM; }

#define SYS_USW_GLOBAL_ACL_PROP_CHK(prop) \
{   \
    CTC_MAX_VALUE_CHECK(prop->acl_en, 1);     \
    CTC_MAX_VALUE_CHECK(prop->direction, CTC_EGRESS); \
    if (prop->direction == CTC_INGRESS)   \
    {   \
        CTC_MAX_VALUE_CHECK(prop->acl_priority, MCHIP_CAP(SYS_CAP_ACL_INGRESS_LKUP_NUM)-1);   \
    }   \
    else    \
    {   \
        CTC_MAX_VALUE_CHECK(prop->acl_priority, MCHIP_CAP(SYS_CAP_ACL_EGRESS_LKUP_NUM)-1);   \
    }   \
    CTC_MAX_VALUE_CHECK(prop->tcam_lkup_type,CTC_ACL_TCAM_LKUP_TYPE_MAX);  \
    CTC_MAX_VALUE_CHECK(prop->hash_lkup_type, CTC_ACL_HASH_LKUP_TYPE_MAX-1);    \
    CTC_MAX_VALUE_CHECK(prop->hash_field_sel_id, 0xF);    \
}

#define SYS_ACL_PROPERTY_CHECK(prop)    \
{   \
    SYS_USW_GLOBAL_ACL_PROP_CHK(prop);\
    if (CTC_ACL_TCAM_LKUP_TYPE_COPP == prop->tcam_lkup_type && !DRV_FROM_AT(lchip))\
    {\
        return CTC_E_NOT_SUPPORT;\
    }\
}

#define SYS_L3IFID_VAILD_CHECK(l3if_id)         \
if (l3if_id == 0 || l3if_id > (MCHIP_CAP(SYS_CAP_SPEC_L3IF_NUM)))  \
{                                               \
	return CTC_E_BADID;\
}

#define    SYS_MAX_VALUE_CHECK_WITH_UNLOCK(var, max_value, mutex) \
    { \
        if ((var) > (max_value)) \
        { \
            sal_mutex_unlock(mutex); \
            return CTC_E_INVALID_PARAM; \
        } \
    }


#define SYS_CHIP_SUPPORT_CHECK(lchip, chip_type) \
do{\
    if(chip_type == drv_get_chip_type(lchip))\
    {\
        return CTC_E_NOT_SUPPORT;\
    }\
}while(0)

#define SYS_IP_VRFID_CHECK(vrfid)       \
    {                                                                   \
        if (vrfid > MCHIP_CAP(SYS_CAP_SPEC_MAX_VRFID))    \
        {                                                               \
            return CTC_E_BADID;                                 \
        }                                                               \
    }

#define SYS_VLAN_RANGE_EGRESS_BLOCK_ID_CHECK(vrange_info) \
    { \
        if (CTC_EGRESS == vrange_info->direction && vrange_info->block_id != 0) \
        {    return CTC_E_INVALID_PARAM; } \
    }

#define SYS_VLAN_RANGE_INFO_CHECK(vrange_info) \
    { \
        CTC_BOTH_DIRECTION_CHECK(vrange_info->direction); \
        if (VLAN_RANGE_ENTRY_NUM <= vrange_info->vrange_grpid) \
        {    return CTC_E_INVALID_PARAM; } \
    }

#define SYS_APS_GROUP_ID_CHECK(aps_group_id)  \
    { \
        if (aps_group_id >= SYS_FTM_SPEC(lchip, CTC_FTM_SPEC_APS)){ \
            return CTC_E_INVALID_PARAM; } \
    }

#define SYS_STATS_IS_ACL_PRIVATE(ptr)   (DRV_IS_DUET2(lchip) ? ((ptr)& 0x8000) : ((ptr)& 0x10000))
#define SYS_STATS_DECODE_CHIP_PTR_OFFSET(ptr) (DRV_IS_DUET2(lchip) ? ((ptr)& 0xFFF) : ((ptr)& 0x1FFF))
#define SYS_STATS_MAC_BASED_STATS_XQMAC_RAM_DEPTH     160u


#define IS_MCAST_DESTMAP(dm) ((dm >> 18) & 0x1)

#define SYS_L4_PROTOCOL_IPV4_ICMP                        1
#define SYS_L4_PROTOCOL_IPV4_IGMP                        2
#define SYS_L4_PROTOCOL_TCP                              6
#define SYS_L4_PROTOCOL_UDP                              17
#define SYS_L4_PROTOCOL_RDP                              27
#define SYS_L4_PROTOCOL_IPV6_ICMP                        58
#define SYS_L4_PROTOCOL_GRE                              47
#define SYS_L4_PROTOCOL_IPV4                             4
#define SYS_L4_PROTOCOL_IPV6                             41
#define SYS_L4_PROTOCOL_DCCP                             33
#define SYS_L4_PROTOCOL_SCTP                             132
#define SYS_L4_PROTOCOL_SRH                              43
#define SYS_L4_PROTOCOL_ETH                              143

#define SYS_MTU_MAX_SIZE     0x3FFF


#define SYS_ACL_TCAM_LKUP_TYPE_NONE                0
#define SYS_ACL_TCAM_LKUP_TYPE_L2                  1
#define SYS_ACL_TCAM_LKUP_TYPE_L2_L3               2
#define SYS_ACL_TCAM_LKUP_TYPE_L3                  3
#define SYS_ACL_TCAM_LKUP_TYPE_VLAN                4
#define SYS_ACL_TCAM_LKUP_TYPE_L3_EXT              5
#define SYS_ACL_TCAM_LKUP_TYPE_L2_L3_EXT           6
#define SYS_ACL_TCAM_LKUP_TYPE_CID                 7
#define SYS_ACL_TCAM_LKUP_TYPE_INTERFACE           8
#define SYS_ACL_TCAM_LKUP_TYPE_FORWARD             9
#define SYS_ACL_TCAM_LKUP_TYPE_FORWARD_EXT         10
#define SYS_ACL_TCAM_LKUP_TYPE_COPP                11
#define SYS_ACL_TCAM_LKUP_TYPE_UDF                 12
#define SYS_ACL_TCAM_LKUP_TYPE_STK_HDR             13
#define SYS_ACL_TCAM_LKUP_TYPE_MAX                 14


#define SYS_GLBOAL_ROUTE_DEFAULT_CID_VALUE  254
#define SYS_GLBOAL_L3IF_CID_VALUE  253
#define SYS_GLBOAL_IPSA_CID_VALUE  252

#define SYS_IPUC_REPLACE_MODE_EN (MCHIP_CAP(SYS_CAP_SPEC_L3IF_NUM) == 2047)
#define SYS_GLBOAL_ROUTE_DEFAULT_CID_VALUE  254
#define SYS_GLBOAL_L3IF_CID_VALUE  253
#define SYS_GLBOAL_IPSA_CID_VALUE  252

#define SYS_HASH_SIZE_COMPRESS_RATE_2    2
#define SYS_HASH_SIZE_COMPRESS_RATE_4    4
#define SYS_HASH_SIZE_COMPRESS_RATE_8    8
#define SYS_HASH_SIZE_COMPRESS_RATE_16   16

/*tbl has 1 entry per dp and need set the same content,could use this macro*/
#define SYS_SET_TBL_ALL_DP(lchip, cmd, value) \
    do {\
         if(DRV_FROM_AT(lchip)){\
             CTC_ERROR_RETURN(DRV_IOCTL(lchip, 0, cmd, &value)); \
        }\
        else{\
            uint8 dp = 0; \
            for(dp = 0; dp < MCHIP_CAP(SYS_CAP_DP_MAX_NUM); dp++){ \
                 CTC_ERROR_RETURN(DRV_IOCTL(lchip, dp, cmd, &value)); \
             }\
        } \
    } while (0)

#define SYS_SET_FIELD_TBL_ALL_DP(lchip, cmd, value) \
    do {\
        if(DRV_FROM_AT(lchip)){\
           CTC_ERROR_RETURN(DRV_FIELD_IOCTL(lchip, 0, cmd, &value)); \
        }\
        else {\
            uint8 dp = 0; \
            for(dp = 0; dp < MCHIP_CAP(SYS_CAP_DP_MAX_NUM); dp++){ \
                   CTC_ERROR_RETURN(DRV_FIELD_IOCTL(lchip, dp, cmd, &value)); \
            }\
        } \
    } while (0)

#ifdef ARCTIC
#define SYS_VCHIP_PP_IS_NOT_BASE(lchip) (DRV_FROM_AT(lchip) && (lchip != drv_vchip_get_pp_base(lchip)))

#define SYS_VCHIP_MASTER_INIT(lchip, master, fea) \
    if (SYS_VCHIP_PP_IS_NOT_BASE(lchip) && !MCHIP_FEATURE_PP_EN(lchip, fea)) \
    { \
        (master)[lchip] = (master)[drv_vchip_get_pp_base(lchip)]; \
        return CTC_E_NONE; \
    }

#define SYS_VCHIP_MASTER_DEINIT(lchip, master, fea) \
    if (SYS_VCHIP_PP_IS_NOT_BASE(lchip) && !MCHIP_FEATURE_PP_EN(lchip, fea)) \
    { \
        (master)[lchip] = NULL; \
        return CTC_E_NONE; \
    }
#define SYS_VCHIP_MASTER_INIT_GLOBAL(lchip, master) \
    if (SYS_VCHIP_PP_IS_NOT_BASE(lchip)) \
    { \
        (master)[lchip] = (master)[drv_vchip_get_pp_base(lchip)]; \
        return CTC_E_NONE; \
    }

#define SYS_VCHIP_MASTER_DEINIT_GLOBAL(lchip, master) \
    if (SYS_VCHIP_PP_IS_NOT_BASE(lchip)) \
    { \
        (master)[lchip] = NULL; \
        return CTC_E_NONE; \
    }
#else
#define SYS_VCHIP_PP_IS_NOT_BASE(lchip) 0
#define SYS_VCHIP_MASTER_INIT(lchip, master, fea)
#define SYS_VCHIP_MASTER_DEINIT(lchip, master, fea)
#define SYS_VCHIP_MASTER_INIT_GLOBAL(lchip, master)
#define SYS_VCHIP_MASTER_DEINIT_GLOBAL(lchip, master)
#endif

#define SYS_VCHIP_DUAL_CORE_MODE(lchip) (drv_vchip_get_core_num(lchip) > 1)

#define SYS_VCHIP_DUAL_CORE_LCHIP_MAP(lchip, dual_core_lchip) { \
            uint8 _core_pp_num = drv_vchip_get_pp_num(lchip) / 2; \
            uint8 _pp_id = (lchip) - drv_vchip_get_pp_base(lchip); \
            dual_core_lchip = (_pp_id >= _core_pp_num) ? ((lchip) - _core_pp_num) : ((lchip) + _core_pp_num); \
    }


#define SYS_CHIP_CONVERT_DMA(lchip) (lchip)

#define SYS_CHIP_CONVERT(lchip) (lchip)

#if (defined E_UNIT) && (FEATURE_MODE ==  0)
#define SYS_EUNIT_HW_LOCK(lchip, eunit, lock_id) \
    do {\
        sys_usw_eunit_hw_lock(lchip, eunit,lock_id);\
    } while (0)

#define SYS_EUNIT_HW_UNLOCK(lchip, eunit, lock_id) \
    do {\
        sys_usw_eunit_hw_unlock(lchip, eunit, lock_id);\
    } while (0)

#define SYS_EUNIT_GET_HW_LOCK(lchip, type, p_eunit, p_lock_id) \
    do {\
        sys_usw_eunit_get_hw_lock(lchip, type, p_eunit, p_lock_id);\
    } while (0)
#else
#define SYS_EUNIT_HW_LOCK(lchip, eunit, lock_id)
#define SYS_EUNIT_HW_UNLOCK(lchip, eunit, lock_id)
#define SYS_EUNIT_GET_HW_LOCK(lchip, type, p_eunit, p_lock_id)
#endif

enum sys_bpe_igs_muxtype_e
{
    BPE_IGS_MUXTYPE_NOMUX = 0,
    BPE_IGS_MUXTYPE_MUXDEMUX = 1,
    BPE_IGS_MUXTYPE_EVB = 2,
    BPE_IGS_MUXTYPE_CB_DOWNLINK = 3,
    BPE_IGS_MUXTYPE_PE_DOWNLINK_WITH_CASCADE_PORT = 4,
    BPE_IGS_MUXTYPE_PE_UPLINK = 5,
    EPE_IGS_MUXTYPE_GEM_PORT = 6,
    BPE_IGS_MUXTYPE_NUM
};
typedef enum sys_bpe_igs_muxtype_e bpe_igs_muxtype_t;

enum sys_bpe_egs_muxtype_e
{
    BPE_EGS_MUXTYPE_NOMUX,
    BPE_EGS_MUXTYPE_MUXDEMUX = 2,
    BPE_EGS_MUXTYPE_LOOPBACK_ENCODE,
    BPE_EGS_MUXTYPE_EVB,
    BPE_EGS_MUXTYPE_CB_CASCADE,
    BPE_EGS_MUXTYPE_UPSTREAM,
    BPE_EGS_MUXTYPE_CASCADE,
    BPE_EGS_MUXTYPE_NUM
};
typedef enum sys_bpe_egs_muxtype_e bpe_egs_muxtype_t;

enum sys_ptp_rtc_e
{
    SYS_PTP_RTC_0,
    SYS_PTP_RTC_1,
    SYS_PTP_RTC_2,
    SYS_PTP_RTC_3,
    SYS_PTP_RTC_4,
    SYS_PTP_RTC_5,
    SYS_PTP_DOMAIN_MAX
};
typedef enum sys_ptp_rtc_e sys_ptp_rtc_t;

enum sys_ptp_shadow_mask_e
{
    SYS_PTP_SHADOW_DRIFT,
    SYS_PTP_SHADOW_DRIFT_DURA,
    SYS_PTP_SHADOW_DURA_CNT,
    SYS_PTP_SHADOW_SEC_CNT,
    SYS_PTP_SHADOW_NS_CNT,
    SYS_PTP_SHADOW_LOCAL_TS,
    SYS_PTP_SHADOW_MAX
};
typedef enum sys_ptp_shadow_mask_e sys_ptp_shadow_mask_t;

enum sys_ptp_ts_rc_e
{
    SYS_PTP_TS_RC_DMA,
	SYS_PTP_TS_RC_TOP = 4,
    SYS_PTP_TS_RC_MAC = 9,
    SYS_PTP_TS_RC_OAM = 89,
    SYS_PTP_TS_RC_METER = 93,
    SYS_PTP_TS_RC_IPE = 94,
    SYS_PTP_TS_RC_IPE_IPFIX = 98,
    SYS_PTP_TS_RC_EPE = 99,
    SYS_PTP_TS_RC_EPE_IPFIX = 103,
    SYS_PTP_TS_RC_MAX
};
typedef enum sys_ptp_ts_rc_e sys_ptp_ts_rc_t;


#ifdef EMULATION_ENV
#define DOWN_FRE_RATE 5000
#else
#define DOWN_FRE_RATE 1
#endif

typedef uint32 ds_t[32];
typedef uint32 ds1_t[64];

struct sys_traverse_s
{
    void* data;
    void* data1;
    uint32 value1;
    uint32 value2;
    uint32 value3;
    uint32 value4;
};
typedef struct sys_traverse_s  sys_traverse_t;


/*
  * sys callback related start
  *
  */

struct sys_com_dot1ae_port_bind_node_s
{
    ctc_slistnode_t head;
    uint32 value;
};
typedef struct sys_com_dot1ae_port_bind_node_s sys_com_dot1ae_port_bind_node_t;

struct sys_com_dot1ae_bind_sc_s
{
  uint8  type;  /*0-port, 1-nexthop, 2-vp*/
  uint8  dir;
  uint8  include_sci;
  uint16  sc_index;
  uint32 gport;
  uint8 sci[8];
  uint32 replayProtectWindow;
  uint16 macsecMaxLen;
  uint32  macsecType : 1,
            validateFrames : 2,
            replayProtect : 1,
            controlledPortEnabled : 1,
            discardUncontrolledSecTagPkt : 1,
            discardUnsupportSecTagPkt : 1,
            protectFrames : 1,
            SecYP2MP:1,
            dot1AE_RX_En : 1,
            dot1AE_TX_En : 1,
            enable:1,
            clear_tag_en:1,
            rsv:19;
  uint32 *p_chan_id;/*for p2mp, may exist more than 1 sec-chan on a port*/
  uint32 chan_id;
};
typedef struct sys_com_dot1ae_bind_sc_s sys_com_dot1ae_bind_sc_t;

struct sys_com_dot1ae_hash_type_s
{
    uint32 gport;
    uint8 dir;
    uint8 type;
    uint8 is_set;
};
typedef struct sys_com_dot1ae_hash_type_s sys_com_dot1ae_hash_type_t;

#define SYS_COM_LDP_SRH_ID(srh_id)   ((0 != srh_id)?(1<<31 | srh_id):0)
#define SYS_COM_LDP_ECMP_ID(ecmp_id)   ((0 != ecmp_id)?(1<<30 | ecmp_id):0)
struct sys_com_ldp_update_s
{
    uint8  is_update;
    uint8  bypass_igr_edit;
    uint8  nexthop_ext;
    uint8  dsnh_valid :1;
    uint8  bind_ldp :1;
    uint8  is_srv6 :1;
    uint8  ul_nh_en :1;
    uint8  aps_en :1;
    uint8  is_del :1;
    uint8  rsv:2;
    uint32 ecmp_if_id;
    uint32 ecmp_gid;
    uint32 destmap;
    uint32 dsnh_offset;
    uint32 ldp;
    uint32 nhid;
};
typedef struct sys_com_ldp_update_s sys_com_ldp_update_t;

typedef struct
{
    uint32 table_id;
    uint32 field_enable;
    uint32 field_label;
    uint32 field_lkup_type;
    uint32 field_gport_type;
    uint32 field_use_pi_vlan;
}sys_register_glb_acl_lkup_t;

struct sys_com_ldp_node_s
{
     uint32 ldp;
     ctc_list_pointer_t  update_list;
};
typedef struct sys_com_ldp_node_s sys_com_ldp_node_t;

enum sys_im_type_e
{
    SYS_IM_TYPE_IPV4,
    SYS_IM_TYPE_IPV6,
    SYS_IM_TYPE_VXLAN_IPV4,
    SYS_IM_TYPE_VXLAN_IPV6,
    SYS_IM_MAX_TYPE
};
typedef enum sys_im_type_e sys_im_type_t;

struct sys_com_npm_im_ip_s
{
    uint8 im_proto;
    uint8 rsv[3];
    uint32 src_node_fp_id[SYS_IM_MAX_TYPE];
    uint32 src_node_delay_fp_id[SYS_IM_MAX_TYPE];
    uint32 sink_node_fp_id[SYS_IM_MAX_TYPE];
};
typedef struct sys_com_npm_im_ip_s sys_com_npm_im_ip_t;

struct sys_com_eunit_learning_aging_cfg_s
{
    uint32 enable : 1;
    uint32 conflict_sync_en : 1;
    uint32 conflict_fifo_depth : 12; /*max : 1024*/
    uint32 enable_valid : 1;
    uint32 conflict_sync_en_valid : 1;
    uint32 conflict_fifo_depth_valid : 1;
    uint32 fifo_intr_cnt : 6;
    uint32 fifo_intr_cnt_valid : 1;
    uint32 rsv    : 8;
};
typedef struct sys_com_eunit_learning_aging_cfg_s sys_com_eunit_learning_aging_cfg_t;

enum sys_com_eunit_cfg_type_e
{
    SYS_COM_EUNIT_CFG_TSX,
    SYS_COM_EUNIT_CFG_TEX,
    SYS_COM_EUNIT_CFG_MOX,
    SYS_COM_EUNIT_CFG_G8031,
    SYS_COM_EUNIT_CFG_NPM_IM,
    SYS_COM_EUNIT_CFG_IFA,
    SYS_COM_EUNIT_CFG_PTP_DOMAIN_0,
    SYS_COM_EUNIT_CFG_PTP_DOMAIN_1,
    SYS_COM_EUNIT_CFG_SWITCH_ID, /*use MiscExtInfo0/ScpuMiscExtInfo0 */
    SYS_COM_EUNIT_CFG_LED,
    SYS_COM_EUNIT_CFG_LED_MAPPING,
    SYS_COM_EUNIT_CFG_LEARNING_AGING,

    SYS_COM_EUNIT_CFG_MAX
};
typedef enum sys_com_eunit_cfg_type_e sys_com_eunit_cfg_type_t;


typedef int32 (*SYS_CB_DOT1AE_BIND_SEC_CHAN_FUNC)(uint8 lchip, sys_com_dot1ae_bind_sc_t* p_bind_sc);
typedef int32 (*SYS_CB_DOT1AE_UNBIND_SEC_CHAN_FUNC)(uint8 lchip, sys_com_dot1ae_bind_sc_t* p_bind_sc);
typedef int32 (*SYS_CB_DOT1AE_GET_BIND_SEC_CHAN_FUNC)(uint8 lchip, sys_com_dot1ae_bind_sc_t* p_bind_sc);
typedef int32 (*SYS_CB_DOT1AE_GET_SECY_STATS_FUNC)(uint8 lchip, uint32 gport, uint8 dir, void* p_stats);
typedef int32 (*SYS_CB_DOT1AE_SET_HASH_TYPE_FUNC)(uint8 lchip, sys_com_dot1ae_hash_type_t* hash_type);
#if 0 /* AT_TODO */
typedef int32 (*SYS_CB_DOT1AE_SET_CLEAR_TAG_TYPE_FUNC)(uint8 lchip, uint8 type, uint32 gport);
typedef int32 (*SYS_CB_DOT1AE_GET_CLEAR_TAG_TYPE_FUNC)(uint8 lchip, uint8* type, uint32 gport);
#endif
typedef int32 (*SYS_CB_STK_GET_STKHDR_VER_FUNC)(uint8 lchip, uint8* p_legacy_en);
typedef int32 (*SYS_CB_STK_GET_RSV_TRUNK_NUM_FUNC)(uint8 lchip, uint8* number);
typedef int32 (*SYS_CB_STK_GET_MCAST_PROFILE_MET_OFFSET_FUNC)(uint8 lchip,  uint16 mcast_profile_id, uint32 *p_stacking_met_offset);
typedef int32 (*SYS_CB_INBAND_SET_PORT_EN_FUNC)(uint8 lchip, uint32 gport, uint32 enable);
typedef int32 (*SYS_CB_INBAND_GET_PORT_EN_FUNC)(uint8 lchip, uint32 gport, uint32* enable);
typedef int32 (*SYS_CB_INBAND_TIMER_FUNC)(uint8 lchip, uint32 timer);
typedef int32 (*SYS_CB_INBAND_TX_FUNC)(uint8 lchip, void* cfg);
typedef int32 (*SYS_CB_INBAND_RX_FUNC)(uint8 lchip, void* cfg);
typedef int32 (*SYS_CB_HMAC_GET_SHA_KEY_FUNC)(uint8 lchip, void* p_hmac, uint32* p_key_index, uint8 flag);
typedef int32 (*SYS_CB_DTEL_PKT_RX_FUNC)(uint8 lchip, void* p_pkt_rx);
typedef int32 (*SYS_CB_STK_GET_BINDING_TRUNK_FUNC)(uint8 lchip, uint32 gport, uint8* trunk_id);
typedef int32 (*SYS_CB_MIRROR_SET_DST_TO_LINKAGG_FUNC)(uint8 lchip, uint16 tid, uint32* member_list, uint16 member_cnt, uint8 is_set);
typedef int32 (*SYS_CB_NPM_IM_FLOW_TO_ACL_FUNC)(uint8 lchip, uint32 flow_id, void* p_npm_im_flow);
typedef int32 (*SYS_CB_ACL_TO_NPM_IM_FLOW_FUNC)(uint8 lchip, void* p_npm_im_flow, uint32 bind_en);
typedef int32 (*SYS_CB_STK_GET_TRUNK_BY_RCHIP_FUNC)(uint8 lchip, uint8 remote_gchip, uint8* trunk_id);
typedef int32 (*SYS_CB_MIRROR_UPDATE_TRUNK_BY_RCHIP_FUNC)(uint8 lchip, uint8 remote_gchip, uint8 trunk_id);
typedef int32 (*SYS_CB_ACL_OP_GLB_PRESEL_EN_FUNC)(uint8 lchip, uint8 is_set, uint8* enable);
typedef int32 (*SYS_CB_QOS_WRR_EN_FUNC)(uint8 lchip, uint32 gport, uint32* enable, uint8 is_set);
typedef int32 (*SYS_CB_NPM_IM_SET_ECPU_EN_FUNC)(uint8 lchip, uint32 enable);
typedef int32 (*SYS_CB_NPM_IM_GET_ECPU_EN_FUNC)(uint8 lchip, uint32* enable);
typedef int32 (*SYS_CB_OAM_GET_MEP_INDEX_TYPE_FUNC)(uint8 lchip, uint8* enable);
typedef uint8 (*SYS_CB_TSX_GET_MAC_STATS_EN_FUNC)(uint8 lchip);

typedef int32 (*SYS_CB_STK_GET_VERSION_FUNC)(uint8 lchip, uint16 lport, uint8* version);
typedef int32 (*SYS_CB_SCOAM_SET_CLIENT_SPEED_FUNC)(uint8 lchip, uint16 client_speed, uint32 client_id);

typedef int32 (*SYS_CB_LDP_UPDATE_L2_FUNC)(uint8 lchip, sys_com_ldp_update_t* p_param);
typedef int32 (*SYS_CB_LDP_UPDATE_L3_FUNC)(uint8 lchip, sys_com_ldp_update_t* p_param);
typedef int32 (*SYS_CB_LDP_UPDATE_ACL_FUNC)(uint8 lchip, sys_com_ldp_update_t* p_param);
typedef int32 (*SYS_CB_NHID_UPDATE_L2_FUNC)(uint8 lchip, sys_com_ldp_update_t* p_param);
typedef int32 (*SYS_CB_NHID_UPDATE_L3_FUNC)(uint8 lchip, sys_com_ldp_update_t* p_param);
typedef int32 (*SYS_CB_NHID_UPDATE_ACL_FUNC)(uint8 lchip, sys_com_ldp_update_t* p_param);
typedef int32 (*SYS_CB_NPM_IM_SET_EN_FUNC)(uint8 lchip, uint32 type, uint32 enable);
typedef int32 (*SYS_CB_NPM_IM_GET_EN_FUNC)(uint8 lchip, uint32 type, uint32* enable);
typedef int32 (*SYS_CB_NPM_IM_SET_LOSS_PROFILE_FUNC)(uint8 lchip, void*p_loss_prof);
typedef int32 (*SYS_CB_NPM_IM_GET_LOSS_PROFILE_FUNC)(uint8 lchip, void*p_loss_prof);
typedef int32 (*SYS_CB_IPFIX_DFT_CFG_TO_NPM_FUNC)(uint8 lchip, uint8 enable);
typedef int32 (*SYS_CB_NPM_IM_GET_FLOW_ID_FUNC)(uint8 lchip, uint16 metadata, uint32* p_flow_id);
typedef int32 (*SYS_CB_NPM_IM_GET_IP_INFO_FUNC)(uint8 lchip, sys_com_npm_im_ip_t* p_info);
typedef int32 (*SYS_CB_QOS_FCDL_SET_RECOVER_TIMER_FUNC)(uint8 lchip, uint8 enable);
typedef int32 (*SYS_CB_BPE_UPDATE_NON_UC_CHAN_AGG_MEM_FUNC)(uint8 lchip, uint16 tid, uint32* mem_bmp, uint8 is_destroy);
typedef int32 (*SYS_CB_QOS_UPDATE_TRUNK_BY_RCHIP_FUNC)(uint8 lchip, uint8 remote_gchip, uint8 trunk_id);
typedef int32 (*SYS_CB_RESTORE_VLANPTR_2_VRF_FUNC)(uint8 lchip);
typedef int32 (*SYS_CB_EUNIT_SET_CFG_FUNC)(uint8 lchip, uint8 type, void* p_cfg);
typedef int32 (*SYS_CB_EUNIT_GET_CFG_FUNC)(uint8 lchip, uint8 type, void* p_cfg);
typedef int32 (*SYS_CB_QOS_SET_FLOW_CONTROL_FUNC)(uint8 lchip, void* p_fc_prop, uint8 is_recover);
typedef int32 (*SYS_CB_QOS_GET_FLOW_CONTROL_FUNC)(uint8 lchip, void* p_fc_prop);
typedef int32 (*SYS_CB_MPLS_UPDATE_HASH_FUNC)(uint8 lchip);
typedef int32 (*SYS_CB_IPUC_UPDATE_HASH_FUNC)(uint8 lchip);
typedef int32 (*SYS_CB_ACL_SET_IFA_VER_FUNC)(uint8 lchip, uint8 ifa_ver);
typedef int32 (*SYS_CB_QOS_SET_PORT_DYNAMIC_SWITCH_FUNC)(uint8 lchip, uint16 lport, uint8 index);

enum sys_common_cb_type_e
{
    SYS_CB_DOT1AE_BIND_SEC_CHAN,                        /* SYS_CB_DOT1AE_BIND_SEC_CHAN_FUNC */
    SYS_CB_DOT1AE_UNBIND_SEC_CHAN,                    /* SYS_CB_DOT1AE_UNBIND_SEC_CHAN_FUNC */
    SYS_CB_DOT1AE_GET_BIND_SEC_CHAN,                /* SYS_CB_DOT1AE_GET_BIND_SEC_CHAN_FUNC */
    SYS_CB_DOT1AE_GET_SECY_STATS,                     /* SYS_CB_DOT1AE_GET_SECY_STATS_FUNC */
    SYS_CB_DOT1AE_SET_HASH_TYPE,                     /* SYS_CB_DOT1AE_SET_HASH_TYPE_FUNC */
#if 0 /* AT_TODO */
    SYS_CB_DOT1AE_SET_CLEAR_TAG_TYPE,                     /* SYS_CB_DOT1AE_SET_CLEAR_TAG_TYPE_FUNC */
    SYS_CB_DOT1AE_GET_CLEAR_TAG_TYPE,                     /* SYS_CB_DOT1AE_GET_CLEAR_TAG_TYPE_FUNC */
#endif
    SYS_CB_STK_GET_STKHDR_VER,                              /* SYS_CB_STK_GET_STKHDR_VER_FUNC */
    SYS_CB_STK_GET_RSV_TRUNK_NUM,                       /* SYS_CB_STK_GET_RSV_TRUNK_NUM_FUNC */
    SYS_CB_STK_GET_MCAST_PROFILE_MET_OFFSET,    /* SYS_CB_STK_GET_MCAST_PROFILE_MET_OFFSET_FUNC */
    SYS_CB_HMAC_GET_SHA_KEY,                                /* SYS_CB_HMAC_GET_SHA_KEY_FUNC */
    SYS_CB_DTEL_PKT_RX,                                     /* SYS_CB_DTEL_PKT_RX_FUNC */
    SYS_CB_STK_GET_BINDING_TRUNK,                           /* SYS_CB_STK_GET_BINDING_TRUNK_FUNC */
    SYS_CB_MIRROR_SET_DST_TO_LINKAGG,                   /* SYS_CB_MIRROR_SET_DST_TO_LINKAGG_FUNC */
    SYS_CB_NPM_IM_FLOW_TO_ACL,                             /* SYS_CB_NPM_IM_FLOW_TO_ACL_FUNC */
    SYS_CB_ACL_TO_NPM_IM_FLOW,                             /*SYS_CB_ACL_TO_NPM_IM_FLOW_FUNC*/
    SYS_CB_STK_GET_TRUNK_BY_RCHIP,                          /* SYS_CB_STK_GET_TRUNK_BY_RCHIP_FUNC */
    SYS_CB_MIRROR_UPDATE_TRUNK_BY_RCHIP,                /* SYS_CB_MIRROR_UPDATE_TRUNK_BY_RCHIP_FUNC */
    SYS_CB_QOS_UPDATE_TRUNK_BY_RCHIP,                /* SYS_CB_QOS_UPDATE_TRUNK_BY_RCHIP_FUNC */
    SYS_CB_ACL_OP_GLB_PRESEL_EN,                            /* SYS_CB_ACL_OP_GLB_PRESEL_EN_FUNC */
    SYS_CB_QOS_WRR_EN,                                          /* SYS_CB_QOS_WRR_EN_FUNC */
    SYS_CB_NPM_IM_SET_ECPU_EN,                    /* SYS_CB_NPM_IM_SET_ECPU_EN_FUNC */
    SYS_CB_NPM_IM_GET_ECPU_EN,                    /* SYS_CB_NPM_IM_GET_ECPU_EN_FUNC */
    SYS_CB_OAM_GET_MEP_INDEX_TYPE,                    /* SYS_CB_OAM_GET_MEP_INDEX_TYPE_FUNC */
    SYS_CB_STK_GET_VERSION,                        /* SYS_CB_STK_GET_VERSION_FUNC */
    SYS_CB_TSX_GET_MAC_STATS_EN,                        /* SYS_CB_TSX_GET_MAC_STATS_EN_FUNC */
    SYS_CB_SCOAM_SET_CLIENT_SPEED,                        /* SYS_CB_SCOAM_SET_CLIENT_SPEED_FUNC */
    SYS_CB_LDP_UPDATE_L2,                               /* sys_usw_ipuc_update_ldp_dsmac */
    SYS_CB_LDP_UPDATE_L3,                               /* sys_usw_ipuc_update_ldp_dsip */
    SYS_CB_LDP_UPDATE_ACL,                              /* SYS_CB_UPDATE_LDP */
    SYS_CB_NPM_IM_SET_EN,                          /* SYS_CB_NPM_IM_SET_EN_FUNC */
    SYS_CB_NPM_IM_GET_EN,                          /* SYS_CB_NPM_IM_GET_EN_FUNC */
    SYS_CB_NPM_IM_SET_LOSS_PROFILE,                /* SYS_CB_NPM_IM_SET_LOSS_PROFILE_FUNC */
    SYS_CB_NPM_IM_GET_LOSS_PROFILE,                /* SYS_CB_NPM_IM_GET_LOSS_PROFILE_FUNC */
    SYS_CB_IPFIX_DFT_CFG_TO_NPM,                   /* SYS_CB_IPFIX_DFT_CFG_TO_NPM_FUNC */
    SYS_CB_NPM_IM_GET_FLOW_ID,                     /* SYS_CB_NPM_IM_GET_FLOW_ID_FUNC */
    SYS_CB_NPM_IM_GET_IP_INFO,                     /* SYS_CB_NPM_IM_GET_IP_INFO_FUNC */
    SYS_CB_QOS_FCDL_SET_RECOVER_TIMER,             /* SYS_CB_QOS_FCDL_SET_RECOVER_TIMER_FUNC */
    SYS_CB_BPE_UPDATE_NON_UC_CHAN_AGG_MEM,         /* SYS_CB_BPE_UPDATE_NON_UC_CHAN_AGG_MEM_FUNC */
    SYS_CB_NHID_UPDATE_L2,                         /* SYS_CB_NHID_UPDATE_L2_FUNC */
    SYS_CB_NHID_UPDATE_L3,                         /* SYS_CB_NHID_UPDATE_L3_FUNC */
    SYS_CB_NHID_UPDATE_ACL,                        /* SYS_CB_NHID_UPDATE_ACL_FUNC */
    SYS_CB_RESTORE_VLANPTR_2_VRF,                  /* SYS_CB_RESTORE_VLANPTR_2_VRF_FUNC */
    SYS_CB_EUNIT_SET_CFG,                     /*SYS_CB_EUNIT_SET_CFG_FUNC*/
    SYS_CB_EUNIT_GET_CFG,                      /*SYS_CB_EUNIT_SET_CFG_FUNC*/
    SYS_CB_QOS_SET_FLOW_CONTROL,              /* SYS_CB_QOS_SET_FLOW_CONTROL_FUNC */
    SYS_CB_QOS_GET_FLOW_CONTROL,              /* SYS_CB_QOS_GET_FLOW_CONTROL_FUNC */
    SYS_CB_MPLS_UPDATE_HASH,              /* SYS_CB_MPLS_UPDATE_HASH_FUNC */
    SYS_CB_IPUC_UPDATE_HASH,              /* SYS_CB_IPUC_UPDATE_HASH_FUNC */
    SYS_CB_ACL_SET_IFA_VER,               /* SYS_CB_ACL_SET_IFA_VER_FUNC */
    SYS_CB_QOS_SET_PORT_DYNAMIC_SWITCH,       /* SYS_CB_QOS_SET_PORT_DYNAMIC_SWITCH_FUNC */
    SYS_CB_MAX_TYPE
};
typedef  enum sys_common_cb_type_e sys_common_cb_type_t;


struct sys_usw_common_master_s
{
    void* p_cb[SYS_CB_MAX_TYPE];
    uint32 dev_id;
    sal_mutex_t*   pdu_mutex;
};
typedef struct sys_usw_common_master_s sys_usw_common_master_t;
extern sys_usw_common_master_t* p_usw_com_master[CTC_MAX_LOCAL_CHIP_NUM_PP];

extern int32
sys_usw_common_register_cb(uint8 lchip, sys_common_cb_type_t type, void* cb);

#define SYS_CB_REGISTER(lchip, type, cb) sys_usw_common_register_cb(lchip, type, cb)

#define SYS_CB_PTR(TYPE) ((TYPE##_FUNC)(p_usw_com_master[lchip]->p_cb[TYPE]))
#define SYS_CB_RET(ret, TYPE, ...) ((p_usw_com_master[lchip]->p_cb[TYPE] == NULL) ? (ret) : ((TYPE##_FUNC)(p_usw_com_master[lchip]->p_cb[TYPE]))(__VA_ARGS__))
#define SYS_CB(TYPE, ...) ((p_usw_com_master[lchip]->p_cb[TYPE] == NULL) ? 0 : ((TYPE##_FUNC)(p_usw_com_master[lchip]->p_cb[TYPE]))(__VA_ARGS__))
#define SYS_CB_PTR_LCHIP(lchip, TYPE) ((TYPE##_FUNC)(p_usw_com_master[lchip]->p_cb[TYPE]))
#define SYS_CB_LCHIP(lchip, TYPE, ...) ((p_usw_com_master[lchip] == NULL || p_usw_com_master[lchip]->p_cb[TYPE] == NULL) ? \
                                                        0 : ((TYPE##_FUNC)(p_usw_com_master[lchip]->p_cb[TYPE]))(__VA_ARGS__))

#define SYS_COM_ENTRY_HASH_SUPPORT_CHECK(lchip,feature_type) (!MCHIP_FEATURE_PP_EN(lchip, feature_type) || !MCHIP_FEATURE_INIT(lchip, feature_type))
#define SYS_COM_ENTRY_HASH_SUPPORT_CHECK2(lchip,feature_type,local_feature_type) \
    ((local_feature_type == feature_type)&& SYS_COM_ENTRY_HASH_SUPPORT_CHECK(lchip,feature_type))
#define SYS_COM_ENTRY_HASH_NOT_EXIST(lchip, p_hash, entry_id)    \
{\
        if (NULL != sys_usw_com_lookup_entry_hash(lchip, p_hash, entry_id)) {return CTC_E_EXIST;}\
}
#define SYS_COM_ENTRY_HASH_ENTRY_EXIST(lchip, p_hash, entry_id, pp_bmp)    \
{\
    if (NULL == (pp_bmp = sys_usw_com_lookup_entry_hash(lchip, p_hash, entry_id))) {return CTC_E_NOT_EXIST;}\
}
enum sys_com_entry_hash_type_e
{
    SYS_COM_ENTRY_HASH_SCL_ENTRY = 0,
    SYS_COM_ENTRY_HASH_DOT1AE_ENTRY = 0,
    SYS_COM_ENTRY_HASH_L3IF_ENTRY = 0,
    SYS_COM_ENTRY_HASH_ACL_ENTRY = 0,
    SYS_COM_ENTRY_HASH_ACL_UDF_ENTRY,
    SYS_COM_ENTRY_HASH_MAX
};
typedef enum sys_com_entry_hash_type_e sys_com_entry_hash_type_t;

struct sys_com_entry_hash_s
{
    /*key*/
    uint32  id;
    /*action*/
    uint16 pp_bmp;
};
typedef struct sys_com_entry_hash_s sys_com_entry_hash_t;

#define PDU_LOCK      if (p_usw_com_master[lchip]->pdu_mutex) sal_mutex_lock(p_usw_com_master[lchip]->pdu_mutex)
#define PDU_UNLOCK    if (p_usw_com_master[lchip]->pdu_mutex) sal_mutex_unlock(p_usw_com_master[lchip]->pdu_mutex)

/*
  * sys callback related end
  *
  */

/*****************************************************************************************/

extern char*
sys_output_mac(mac_addr_t in_mac);

extern uint8
sys_usw_map_acl_tcam_lkup_type(uint8 lchip, uint8 ctc_lkup_t);

extern uint8
sys_usw_unmap_acl_tcam_lkup_type(uint8 lchip, uint8 sys_lkup_t);

extern int32
sys_usw_common_get_compress_near_division_value(uint8 lchip, uint32 value,uint8 division_wide,uint8 shift_bit_wide,
                                                                 uint16* division, uint16* shift_bits, uint8 is_negative);
extern uint32
sys_usw_common_get_vport_num(uint8 lchip);

const char*
sys_usw_get_pkt_type_desc(uint8 pkt_type);
extern int32
sys_usw_dword_reverse_copy(uint32* dest, uint32* src, uint32 len);
extern int32
sys_usw_byte_reverse_copy(uint8* dest, uint8* src, uint32 len);
extern int32
sys_usw_swap32(uint32* data, int32 len, uint32 hton);

int32
sys_usw_ma_add_to_asic(uint8 lchip, uint32 ma_index, void* dsma);

int32
sys_usw_ma_clear_write_cache(uint8 lchip);


extern int32
sys_usw_task_create(uint8 lchip,
                sal_task_t** ptask,
                char* name,
                size_t stack_size,
                int32 prio,
                sal_task_type_t task_type,
                unsigned long long cpu_mask,
                void (* start)(void*),
                void* arg);

extern uint8
sys_usw_l4_user_type_map(uint8 lchip, uint8 type, uint8 is_ctc2drv);

extern uint8
sys_usw_l4_type_map(uint8 lchip, uint8 type, uint8 is_ctc2drv);

extern char*
sys_output_ipv4(uint32 in_ip);

extern char*
sys_output_ipv6(uint32* in_ip);

extern int32
sys_usw_common_init(uint8 lchip);
extern int32
sys_usw_common_deinit(uint8 lchip);

extern uint32
sys_usw_is_network_port(uint8 lchip, uint32 gport);

typedef int32 (*SYS_CB_REMOVE_PP_BMP_HASH_T)(uint8 lchip, uint32 id);
typedef int32 (*SYS_CB_WB_SYNC_T)(uint8 lchip, uint32 app_id);

extern  int32
 sys_usw_ptp_get_rtc_id(uint8 ts_rc);

extern void*
sys_usw_com_lookup_entry_hash(uint8 lchip, void* p_hash, uint32 entry_id);
extern int32
sys_usw_com_add_entry_hash(uint8 lchip, uint32 mem_mode, void* p_hash, uint32 entry_id, uint16 pp_bmp);
extern int32
sys_usw_com_remove_entry_hash(uint8 lchip, void* p_hash, sys_com_entry_hash_t* p_node);
extern int32
sys_usw_com_remove_entry_hash_by_entry_id(uint8 lchip, void* p_hash, uint32 entry_id); 
extern void*
sys_usw_com_entry_hash_init(uint8 lchip, uint32 entry_num, uint32 block_size);
extern int32
sys_usw_com_entry_hash_deinit(uint8 lchip, void* user_data);
extern int32
sys_usw_ldp_hash_make(sys_com_ldp_node_t* p_data);
extern bool
sys_usw_ldp_hash_cmp(sys_com_ldp_node_t* p_data0, sys_com_ldp_node_t* p_data1);
extern int32
sys_usw_add_ldp_node(uint8 lchip, ctc_hash_t* p_hash, uint32 ldp, ctc_list_pointer_node_t* data);
extern int32
sys_usw_remove_ldp_node(uint8 lchip, ctc_hash_t* p_hash, uint32 ldp, ctc_list_pointer_node_t* data);
extern int32
sys_usw_free_ldp_node(void* node_data, void* user_data);
extern int32
sys_usw_update_trunkid_by_rchip(uint8 lchip, uint8 remote_gchip, uint8 trunk_id);
extern int32
sys_usw_common_check_port_status(uint8 lchip, uint32 gport, sys_qos_shape_profile_t* shp_profile);
extern void
sys_usw_com_wb_restore_entry_hash(uint8 lchip, uint32 entry_id, uint32 mode, void* p_hash);

#define SYS_GPORT_IS_NETWORK_PORT(gport) ((SYS_DMPS_NETWORK_PORT == sys_usw_is_network_port(lchip, gport))||(SYS_DMPS_CPUMAC_NETWORK_PORT == sys_usw_is_network_port(lchip, gport)) )

#ifdef __cplusplus
}
#endif

#endif

